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Электронный компонент: ICL7104-16CPL

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3-34
Features
Typically Less Than 2
V
P-P
Noise (200.00mV Full
Scale, lCL8068)
Accuracy Guaranteed to
1 Count Over Entire
20,000
Counts (2.0000V Full Scale)
Guaranteed Zero Reading for 0V Input
True Polarity at Zero Count for Precise Null Detection
Single Reference Voltage Required
Over-Range and Under-Range Signals Available for
Auto-Ranging Capability
All Outputs TTL Compatible
Medium Quality Reference, 40ppm (Typ) on Board
Blinking Display Gives Visual Indication of Over
Range
Six Auxiliary Inputs/Outputs are Available for
Interfacing to UARTs, Microprocessors or Other
Complex Circuitry
5pA Input Current (Typ) (8052A)
Description
The ICL8052 or ICL8068/lCL71C03 chip pairs with their
multiplexed BCD output and digit drivers are ideally suited
for the visual display DVM/DPM market. The outstanding
4
1
/
2
digit accuracy, 200.00mV to 2.0000V full scale capabil-
ity, auto-zero and auto-polarity combine with true ratiometric
operation, almost ideal differential linearity and time-proven
dual slope conversion. Use of these chip pairs eliminates
clock feedthrough problems, and avoids the critical board
layout usually required to minimize charge injection.
When only 2000 counts of resolution are required, the 71C03
can be wired for 3
1
/
2
digits and give up to 30 readings/sec.,
making it ideally suited for a wide variety of applications.
The ICL71C03 is an improved CMOS plug-in replacement for
the lCL7103 and should be used in all new designs.
Pinouts
Ordering Information
PART NUMBER
TEMP.
RANGE (
o
C)
PACKAGE
PKG.
NO.
ICL8052CPD
0 to 70
14 Ld PDIP
E14.3
lCL8052CDD
0 to 70
14 Ld CERDIP
F14.3
lCL8052ACPD
0 to 70
14 Ld PDIP
E14.3
ICL8052ACDD
0 to 70
14 Ld CERDIP
F14.3
ICL8068CDD
0 to 70
14 Ld CERDIP
F14.3
ICL8068ACDD
0 to 70
14 Ld CERDIP
F14.3
lCL8068ACJD
0 to 70
14 Ld CERDIP
F14.3
ICL71C03CPl
0 to 70
28 Ld PDIP
E28.6
lCL71C03ACPl
0 to 70
28 Ld PDIP
E28.6
ICL8052/ICL8068
(CERDIP, PDIP)
TOP VIEW
ICL71C03 (PDIP)
TOP VIEW
V-
COMP OUT
REF CAP
REF BYPASS
GND
REF OUT
REF SUPPLY
INT OUT
+BUFF IN
+INT IN
-INT IN
-BUFF IN
BUFF OUT
V++
1
2
3
4
5
6
7
14
13
12
11
10
9
8
-1.2V
V
REF
ICL8052/
ICL8068
V+
4
1
/
2
/ 3
1
/
2
POL
RUN/HOLD
COMP IN
V-
REFERENCE
REF. CAP. 1
REF. CAP. 2
ANALOG IN
ANALOG GND
CLOCK IN
UNDER-RANGE
OVER-RANGE
BUSY
D
2
D
3
D
4
B
8
(MSB)
B
2
D
5
(MSD)
STROBE
A-Z IN
A-Z OUT
DIGITAL GND
D
1
(LSD)
B
4
B
1
(LSB)
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
August 1997
ICL8052/ICL71C03,
ICL8068/ICL71C03
Precision 4
1
/
2
Digit, A/D Converter
File Number
3081.1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207
|
Copyright
Intersil Corporation 1999
3-35
Functional Block Diagram
FIGURE 1.
A2
+
-
A3
+
-
INTEG.
COMP.
A1
+
-
BUFFER
14
11
9
INT OUT
-INT IN
BUF OUT
10
-BUF IN
-1.2V
2
1
-15V
7
8
+15V
12
+INT IN
13
ICL8052/8068
INT.
REF.
6
3
+BUF IN
5
REF
OUT
10k
1k
300pF
10
F
COMP
OUT
COMP IN
5
16
9
MULTIPLEXER
COUNTERS
20
CONTROL LOGIC
ZERO
CROSSING
DETECTOR
21
22
23
ICL71C03
REF
AZ OUT
SW3
1
+5V
ANALOG
GND
ANALOG
INPUT
28
BUSY
18
STROBE
13
UNDER
14
12
CLOCK
2
4 1/2 DIGIT/
2
6
5
1
4
10
F (TYP)
CAP 2
REF
CAP 1
8
7
10
11
10k
0.1
F
REF
1
F (TYP)
17
AZ IN
6
-15V
15
0.22
F
10k
90k
100k
4
IN
RUN/
HOLD
RANGE
OVER
RANGE
3 1/2 DIGIT
B
1
B
2
B
3
B
4
LATCH
LATCH
LATCH
LATCH
LATCH
LSD
MSD
SEVEN-
SEGMENT
DECODER
3
POLARITY
19
24
25
26
27
D
5
D
4
D
3
D
2
D
1
ICL8052/ICL71C03, ICL8068/ICL71C03
3-36
Absolute Maximum Ratings
Thermal Information
ICL8052, ICL8068
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
18V
Differential Input Voltage
(8068) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
30V
(8052) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6V
Input Voltage (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
15V
Output Short Circuit Duration All Outputs (Note 2). . . . . . . Indefinite
ICL71C03
Power Supply Voltage (GND to V+) . . . . . . . . . . . . . . . . . . . . . 6.5V
Negative Supply Voltage (GND to V-). . . . . . . . . . . . . . . . . . . . .-17V
Analog Input Voltage (Note 3) . . . . . . . . . . . . . . . . . . . . . . . V+ to V-
Digital Input Voltage (Note 4) . . . . . . . . (GND - 0.3V) to (V+ + 0.3V)
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . .0
o
C to 70
o
C
Thermal Resistance (Typical, Note 5)
JA
(
o
C/W)
JC
(
o
C/W)
CERDIP Package . . . . . . . . . . . . . . . .
75
20
14 Ld PDIP Package . . . . . . . . . . . . . .
100
N/A
28 Ld PDIP Package . . . . . . . . . . . . . .
65
N/A
Maximum Storage Temperature . . . . . . . . . . . . . . . .-65
o
C to 150
o
C
Maximum Lead Temperature (Soldering, 10s) . . . . . . . . . . . . 300
o
C
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. For supply voltages less than
15V, the absolute maximum input voltage is equal to the supply voltage.
2. Short circuit may be to ground or either supply. Rating applies to 70
o
C ambient temperature.
3. Input voltages may exceed the supply voltages provided the input current is limited to
100
A.
4. Connecting any digital inputs or outputs to voltages greater then V+ or less than GND may cause destructive device latchup. For this
reason it is recommended that the power supply to the ICL71C03 be established before any inputs from sources not on that supply are
applied.
5.
JA
is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
PARAMETER
SYMBOL
TEST
CONDITIONS
MIN
TYP
MAX
UNITS
Clock In, Run/Hold, 4 1/2 / 3 1/2
I
INL
V
IN
= 0
-
0.2
0.6
mA
I
INH
V
IN
= +5V
-
0.1
10
A
Comp. In Current
I
INL
V
IN
= 0
-
0.1
10
A
I
INH
V
IN
= +5V
-
0.1
10
A
Threshold Voltage
V
INTH
-
2.5
-
V
All Outputs
V
OL
I
OL
= 1.6mA
-
0.25
0.40
V
B
1
, B
2
, B
4
, B
8
, D
1
, D
2
, D
3
, D
4
, D
5
V
OH
I
OH
= -1mA
2.4
4.2
-
V
Busy, Strobe, Over-Range, Under-Range Polarity
V
OH
I
OH
= -10
A
4.9
4.99
-
V
Switches 1, 3, 4, 5, 6
r
DS(ON)
-
400
-
Switch 2
r
DS(ON)
-
1200
-
Switch Leakage (All)
I
D(OFF)
-
2
-
pA
+5V Supply Range
V+
4
5
6
V
-15V Supply Range
V-
-5
-15
-18
V
+5V Supply Current
I+
f
CLK
= 0
-
1.1
3
mA
-15V Supply Current
I-
f
CLK
= 0
-
0.8
3
mA
Power Dissipation Capacitance
C
PD
vs Clock Frequency
-
40
-
pF
Clock Frequency (Note 6)
DC
2000
1200
kHz
NOTE:
6. This specification relates to the clock frequency range over which the ICL71C03(A) will correctly perform its various functions. See the
"Max Clock Frequency" section under Component Value Selection for limitations on the clock frequency range in a system.
ICL8052/ICL71C03, ICL8068/ICL71C03
3-37
ICL8068 Electrical Specifications
V
SUPPLY
=
15V, T
A
= 25
o
C, Unless Otherwise Specified
PARAMETER
SYMBOL
TEST
CONDITIONS
ICL8068
ICL8068A
UNITS
MIN
TYP
MAX
MIN
TYP
MAX
EACH OPERATIONAL AMPLIFIER
Input Offset Voltage
V
OS
V
CM
= 0V
-
20
65
-
20
65
mV
Input Current (Either Input) (Note 7)
I
IN
V
CM
= 0V
-
175
250
-
80
150
pA
Common-Mode Rejection Ratio
CMRR
V
CM
=
10V
70
90
-
70
90
-
dB
Non-Linear Component of Common-
Mode Rejection Ratio (Note 8)
V
CM
=
2V
-
110
-
-
110
-
dB
Large Signal Voltage Gain
A
V
R
L
= 50k
20,000
-
-
20,000
-
-
V/V
Slew Rate
SR
-
6
-
-
6
-
V/
s
Unity Gain Bandwidth
GBW
-
2
-
-
2
-
MHz
Output Short-Circuit Current
I
SC
-
5
-
-
5
-
mA
COMPARATOR AMPLIFIER
Small-Signal Voltage Gain
A
VOL
R
L
= 30k
-
-
4000
-
-
-
V/V
Positive Output Voltage Swing
+V
O
12
13
-
12
13
-
V
Negative Output Voltage Swing
-V
O
-2.0
-2.6
-
-2.0
-2.6
-
V
VOLTAGE REFERENCE
Output Voltage
V
O
1.5
1.75
2.0
1.60
1.75
1.90
V
Output Resistance
R
O
-
5
-
-
5
-
Temperature Coefficient
TC
-
50
-
-
40
-
ppm/
o
C
Supply Voltage (V++ -V-)
V
SUPPLY
10
-
16
10
-
16
V
Supply Current Total
I
SUPPLY
-
-
14
-
8
14
mA
ICL8052 Electrical Specifications
V
SUPPLY
=
15V, T
A
= 25
o
C, Unless Otherwise Specified
PARAMETER
SYMBOL
TEST
CONDITIONS
ICL8052
ICL8052A
UNITS
MIN
TYP
MAX
MIN
TYP
MAX
EACH OPERATIONAL AMPLIFIER
Input Offset Voltage
V
OS
V
CM
= 0V
-
20
75
-
20
75
mV
Input Current (Either Input) (Note 7)
I
IN
V
CM
= 0V
-
5
50
-
2
10
pA
Common-Mode Rejection Ratio
CMRR
V
CM
=
10V
70
90
-
70
90
-
dB
Non-Linear Component of Common-
Mode Rejection Ratio (Note 8)
V
CM
=
2V
-
110
-
-
110
-
dB
Large Signal Voltage Gain
A
V
R
L
= 50k
20,000
-
-
20,000
-
-
V/V
Slew Rate
SR
-
6
-
-
6
-
V/
s
Unity Gain Bandwidth
GBW
-
1
-
-
1
-
MHz
Output Short-Circuit Current
I
SC
-
20
-
-
20
-
mA
ICL8052/ICL71C03, ICL8068/ICL71C03
3-38
COMPARATOR AMPLIFIER
Small-Signal Voltage Gain
A
VOL
R
L
= 30k
-
4000
-
-
-
-
V/V
Positive Output Voltage Swing
+V
O
12
13
-
12
13
-
V
Negative Output Voltage Swing
-V
O
-2.0
-2.6
-
-2.0
-2.6
-
V
VOLTAGE REFERENCE
Output Voltage
V
O
1.5
1.75
2.0
1.60
1.75
1.90
V
Output Resistance
R
O
-
5
-
-
5
-
Temperature Coefficient
TC
-
50
-
-
40
-
ppm/
o
C
Supply Voltage (V++ -V-)
V
SUPPLY
10
-
16
10
-
16
V
Supply Current Total
I
SUPPLY
-
6
12
-
6
14
mA
NOTES:
7. The input bias currents are junction leakage currents which approximately double for every 10
o
C increase in the junction temperature,
T
J
. Due to limited production test time, the input bias currents are measured with junctions at ambient temperature. In normal
operation the junction temperature rises above the ambient temperature as a result of internal power dissipation, P
D
.
T
J
= T
A
+ R
JA
P
D
, where R
JA
is the thermal resistance from junction to ambient. A heat sink can be used to reduce temperature rise.
8. This is the only component that causes error in dual-slope converter.
System Electrical Specifications: ICL8068/ICL71C03
V++ = +15V, V+ = +5V, V- = -15V, T
A
= 25
o
C, f
CLK
Set for 3 Readings/Sec.
PARAMETER
TEST
CONDITIONS
ICL8068A/ICL71C03
(NOTE 9)
ICL8068A/ICL71C03
(NOTE 10)
UNITS
MIN
TYP
MAX
MIN
TYP
MAX
Zero Input Reading
V
IN
= 0V,
Full Scale = 200mV
-000.0
000.0
+000.0
-000.0
000.0
000.0
Digital
Reading
Ratiometric Error (Note 11)
V
IN
= V
REF
Full Scale = 2V
0.999
1.000
1.001
0.9999
1.0000
1.0001
Digital
Reading
Linearity Over
Full Scale (Error of
Reading from Best Straight Line)
-2V
V
IN
+2V
-
0.2
1
-
0.5
1
Counts
Differential Linearity (Difference
between Worst Case Step of Adjacent
Counts and Ideal Step)
-2V
V
IN
+2V
-
0.01
-
-
0.01
-
Counts
Rollover Error (Difference in Reading
for Equal Positive & Negative Voltage
Near Full Scale)
-V
IN
+V
IN
2V
-
0.2
1
-
0.5
1
Counts
Noise (P-P Value Not Exceeded 95%
of Time)
V
IN
= 0V,
Full Scale = 200mV
-
3
-
-
2
-
V
Leakage Current at Input
V
IN
= 0V
-
200
300
-
100
200
pA
Zero Reading Drift (Note 12)
V
IN
= 0V,
0
o
C
T
A
50
o
C
-
1
5
-
0.5
2
V/
o
C
Scale Factor Temperature Coefficient
(Note 12)
V
IN
= 2V,
0
o
C
T
A
50
o
C
Ext. Ref. 0ppm/
o
C
-
3
15
-
2
5
ppm/
o
C
ICL8052 Electrical Specifications
V
SUPPLY
=
15V, T
A
= 25
o
C, Unless Otherwise Specified (Continued)
PARAMETER
SYMBOL
TEST
CONDITIONS
ICL8052
ICL8052A
UNITS
MIN
TYP
MAX
MIN
TYP
MAX
ICL8052/ICL71C03, ICL8068/ICL71C03